Relocation mechanisms such as base/offset addressing slow down the computer. Since every address generated by a user instruction must be added to the contents of the base address register, the delay of the adder will cause memory accesses to take longer. There are ways to speed up adders by adding extra Boolean logic, called a carry lookahead, or CLA. But there is always some drawback to these new features. One of the common themes in this course is flexibility costs.