Comparison is usually done by subtraction. In this system the sign of the outcome determines if the field length value is less than or greater than the logical address.

Fig. 11.5.3 shows this two-way manipulation of the logical address, which happens at the same time and uses extra hardware for speed. The main adder of the ALU is not used to do this address translation.

In Fig. 11.5.3, an illegal out-of-bounds address is generated, which causes the program to halt. The logical address, 1205, is larger than the field length, which is only 1100 words. Though the physical address 3705 is generated (1205+2500), it is never allowed to get to memory because the error halts everything until the operating system can clean up after the offending program.