One way to cut down on the cost of buses is to multiplex data values on a smaller number of data wires. This has been a standard practice in the realm of cheap microcomputers since their introduction in the late 1970s. For example, suppose that memory reads and writes one byte at a time and there are 1,048,576 bytes that in the memory. This would require 20 address wires, 8 data wires and 2 control wires. However, buses are expensive and the more wires the more expensive the bus. Also, their connectors to other devices are expensive. Some chips do not have enough area to support a large pinout, the count of all wires that communicate between the outside world and the chip, each one terminating in a pin from the ceramic package that encloses the chip.

Multiplexing means reusing the same component for different purposes, and in terms of buses it means that a few data wires are used for double duty. One scheme would have only 4 data wires. To send a single byte would require two time cycles: put the first four bits onto the bus and send it during phase 1, and then send the second four bits during phase 2. The trade off is we sacrifice speed for hardware since there are fewer wires but it now takes twice as long to send a single byte between memory and the CPU, or between memory and an I/O device. But fewer wires also means a smaller pinout, or a smaller chip, and also less complexity in the circuit.