There are many design issues that go into making a bus that is both efficient and cost-effective and as always there are trade-offs. Very fast buses require high quality materials and lots of them, so they cost more. Cheaper buses, often put into low-end computers such as personal computers, skimp on certain things and hence are slower.
All external buses and even some internal ones group wires in terms of function. There are three majors groups of wires based on function:
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A good example of the control wires are the two we used to communicate with memory in previous chapters: MA and RD. MA, memory active, tells whether or not memory is being summoned to do something, while RD, read, tells whether the memory is being read or written. We also explored in an exercise an alternate way to encode these operations using two different wires. (There were three situations: memory read, memory write, and memory quiescent.) Note that in earlier chapters we used WR (write) instead of RD (read), but since they are opposite and symmetric, it really doesn't matter which wire we use.
One way to cut down on the cost of buses is to multiplex data values on a smaller number of data wires. This has been a standard practice in the realm of cheap microcomputers since their introduction in the late 1970s. For example, suppose that memory reads and writes one byte at a time and there are 1,048,576 bytes that in the memory. This would require 20 address wires, 8 data wires and 2 control wires. However, buses are expensive and the more wires the more expensive the bus. Also, their connectors to other devices are expensive. Some chips do not have enough area to support a large pinout, the count of all wires that communicate between the outside world and the chip, each one terminating in a pin from the ceramic package that encloses the chip.
Multiplexing means reusing the same component for different purposes, and in terms of buses it means that a few data wires are used for double duty. One scheme would have only 4 data wires. To send a single byte would require two time cycles: put the first four bits onto the bus and send it during phase 1, and then send the second four bits during phase 2. The trade off is we sacrifice speed for hardware since there are fewer wires but it now takes twice as long to send a single byte between memory and the CPU, or between memory and an I/O device. But fewer wires also means a smaller pinout, or a smaller chip, and also less complexity in the circuit.
Fig. 16.2.1 shows the contrasting situation of sending 10011101 over 8 wires in one time unit from device A to device B, and sending that same byte over 4 wires in two time units.
This kind of sharing is called time multiplexing because the sharing occurs in different time periods. When we looked at multiplexor circuits many chapters ago, we saw a different kind of multiplexing, one where many components shared the same wire, but only one device could use that wire at a single moment in time. Though this, too, is a form of time sharing, it is logically different and is called device multiplexing since the sharing occurs between different devices. Computer buses also use device multiplexing, even if they do not use time multiplexing.
It would also be possible to multiplex the address onto a smaller number of wires, but this is less common since the address must be entirely present and available to the decoder before that circuit can begin the process of decoding.
The logical extreme would be to have only one data wire, which is often done. If there is only one data wire, we say that we have a serial bus since all the data bits flow in a serial or sequential fashion in time, one after another. The contrasting scheme, where there are many data wires and they all transmit a part of the value at the same time, is called a parallel bus because the data values are traveling together in parallel over the wires from their source to their destination.
Parallel buses are obviously much faster than serial buses. For example, if we used a serial bus to transmit bytes, it would take 8 times as long to transmit a byte this way than with an 8-bit parallel bus. Thus, most internal buses in a computer are parallel.
However, buses that connect I/O devices to a computer are serial. Most microcomputer manufacturers use such low cost buses to connect slow devices like printers and keyboards to computers. The time it takes for a keyboard to transmit a byte is significantly less, even using only one data wire, than it takes for the mechanical key to spring back into position, and users never know the difference. However, disk drives can often transmit data at very high speeds, so a parallel bus usually connects them to other components like memory and the CPU.
One type of bus that is enormously important to today's users is the network connection, and that is virtually always serial due to the high cost of telephone connections. In fact, there is only one wire and all the control, address and data functions take their turn on this one wire! How do the two ends of a network wire, be it a telephone line or coaxial cable on an Ethernet LAN, know when a data value is being transmitted instead of a control or address value? Basically, bit patterns on the one wire are recognized and then decoded into a packet, or a time-sequence of bit patterns that put all the control, address and data information into their proper time slots.
