The trouble with this method, simple as it seems, is that long sequences of all 1s or all 0s will cause the voltage to be constant. Since no two physical clocks will ever stay perfectly in synch forever, but will tend to drift, they may lose track of where the bit boundaries are and thus get off. Every transition, however, allows the receiver to determine where the bit boundary should be so it can reset itself appropriately. Fig. 23.2.2 shows how a receiver with a slightly fast clock can get off and think there are more bits than were really sent by the sender. This effect is exaggerated; real clocks may take thousands of clock cycles to get out of synch.