Section 5.10: Connecting RAM to the CPU (Frame 2)                     [prev][home][next]

Fig. 5.10.1 shows two sets of data wires: one for input (RI's) and one for output (RO's). In reality, these wire sets are both connected to the special MBR register. Let's create a new RAM diagram that reflects this:


Fig. 5.10.1: RAM with MBR

The output of the MBR is the input to the RAM's flip-flops, i.e. the RI wires of Fig. 5.9.1. The input to the MBR is a combination of the output of the flip-flops (the RO wires of Fig. 5.9.1) and data wires that come from the rest of the computer. These wires are attached to other registers in the CPU.