Sometimes latches are inconvenient to use when forming complex memory circuits because the value they store can be changed whenever the input changes. In huge circuits, the exact timing of the wires becomes a monumental headache and occasionally different wires are slower to react than others, due to length of the wire, delay of gates and other reasons.
Latches are said to be level-triggered because changes in their stored values are triggered by changes in the values of their inputs. In particular these input values change from a 1 to a 0, or a 0 to a 1, and stay there for a while. It is only after the inputs have changed to a new value and stayed there that the latches record their new values.
Another type of memory cell, called a flip-flop, stores a single bit but is edge-triggered. It is called a flip-flop and its schematic is very much like a latch, only with a little arrow on the CK input wire:
Flip-flops are made of regular gates, just like latches, except they are more complicated. Fig. 5.4.2 shows a flip-flop. Notice that there are actually three little SR-latches, hooked together in a strange way so that there is mutual interaction.
Let's review a little bit of the physics of digital signals. We usually draw the signal as a function time, flipping instantaneously from logic 0 to logic 1 as in Fig. 5.4.3:
But this is not the way things work in the physical world. Voltages do not change in 0 time units, but rather they increase gently, then rapidly, and then level off again, as shown in Fig. 5.4.4:
Flip-flops are designed to change the value they store during the brief interval of time when the voltage is changing from one level to another. This time, called either the rising edge or the falling edge, depending upon the two plateaus on either side, is always much shorter than the level period in between, hence flip-flops are more reliable. Level-triggered devices, latches, have a much longer time during which to change their state and hence are more sensitive to fluctuations. Fig. 5.4.5 shows the two different edge times:
Any particular flip-flop is designed to change the value stored either on the falling edge or the rising edge, but not both. Hardware designers can select whichever type is most convenient. The flip-flop of Fig. 5.4.2 changes state on the falling edge.
