Quiz 5.7

DIRECTIONS: Read each question carefully. Then click on the dot next to the answer that most closely fits the question. Try to answer all questions on this quiz and when you are done, click on the grade me button at the bottom.


Coverage: Sections 5.11 and 5.12

  1. All data that is read from the memory ultimately goes where before it can be processed?
into system registers
onto a floppy diskette
back into memory

  1. Which wire permits the value of the MBR to be changed, either by the CPU or by the memory?
WR
MA
MBRLD

  1. Which movement of data must be done before a memory write?
MBR -> System registers
System registers -> MBR
MBR -> MAR
System registers -> MAR

  1. What do we call the operation of temporarily setting a wire to 1?
polling
setting
strobing
enabling

  1. What do we call the time it takes to do one complete memory operation?
memory cycle
fetch-decode-execute cycle
hardware cycle
bus cycle

  1. Which of the following notations means a group of wires get relevant values (some mix of 1s and 0s)?
GIFs/fat_wire.gif
GIFs/skinny_wire.gif
GIFs/strobe_wire.gif

  1. Which operation below is a memory read?

GIFs/read_write_cycles.gif
X
Y

  1. Which delay in the memory operation below is the decode delay?

GIFs/read_write_cycles.gif
A
B
C

  1. At which point in time in the following diagram of a read operation is the data safely stored in the MBR, ready for consumption by the system?

GIFs/read_cycle_with_times.gif
a
b
c
d
e

  1. Why does setting MBRLD to 1 for only a brief period of time work (see below)? Why doesn't MBRLD have to be 1 for a longer period of time so that the values will be properly copied into the register?
the MBR is made up of flip-flops which are edge-triggered
the timing has been worked out very precisely by hardware designers
modern components are fast enough that they do not need excessive delays
the values on the RO wires will remain at the correct levels even into the next memory cycle