Section 7.5: Fetch/decode/execute cycle (Frame 2)                     [prev][home][next]

When the CSC-1 is ready to do an instruction, it goes through the following steps:

  1. PC is copied into the MAR and a memory read is initiated. When the memory is done, the MBR is copied into the IR. One is added to the PC to point it to the next instruction. This is called the instruction fetch stage.

  2. The instruction in the IR is decoded by a special decoder in the control unit. This is where the opcode triggers the various control points that implement this instruction. This is called the operation decoding stage.

  3. Next comes an optional step, depending upon the instruction. If the instruction has an operand that is a memory address, the lower 12-bits of the IR are copied into the MAR and another memory read is initiated. When done, the MBR is copied into the TMP register. This is called the operand fetch stage.

  4. Finally the real work gets done, which is the actual instruction getting executed. In this step, the values flow through the ALU and shifter and are latched back into the A register. This is called the execute stage.