In the course of running a machine language program on the CSC-1, the control unit sets various control wires to 1 or 0 at the appropriate time in order to execute primitive instructions of a machine language program. All high level programs written in C, BASIC, FORTRAN, Java or the myriad of other programming languages, must ultimately be turned into a stream of primitive machine instructions, since this is all that the actual hardware understands. Doing just one instruction involves a lot of tiny steps. This is done millions of times per second on even personal computers nowadays. It is amazing to think of the myriad changes in the movements of electrons that occur in the fastest blink of an eye while typing on the keyboard, moving the mouse or watching the screen repaint itself. We will now dissect the steps that the hardware goes through when it performs just one instruction.
This cycle, one complete instruction execution, is often called the fetch/decode/execute cycle, or just the machine cycle or the instruction cycle. The CSC-1 computer is typical of many computers so we will study it as a prototype.
When the CSC-1 is ready to do an instruction, it goes through the following steps:
There are several variations on this plan. First of all, if there is no operand, as is the case with instructions A2S, S2A, HLT, STS, LDS, SHL, SHR, NOP and RET, the operand fetch stage is skipped and the computer immediately moves on to executing the instruction. Thus, these no-operand instructions are faster.
Second, the LDI instruction merely copies the lower 12-bits of the IR directly into the TMP register without going to memory. LDI stands for LoaD Immediate. The adjective immediate is used when the data is immediately available in the instruction, and does have to be explicitly fetch later. LDI is faster than LOD because the second memory read (operand fetch step) can be skipped.
Third, several of the instructions alter the program counter, or PC register. This is done during the execute stage by writing a new value into PC. Notice that 1 is added to PC after the instruction is fetched. However, if PC is entirely overwritten, this incremented PC value is lost and has no effect. The following instructions all change PC: JMP, JZ, JC, JP, JN, JV, CAL, RET. Some of them always change the PC, like JMP, CAL, and RET. These are called unconditional jumps. Others are conditional because they depend upon the condition bits CNVZ. Note that JP, jump positive, is done when N=0. All others are done when one of the four condition bits is 1. Synonyms for jump are branch or goto.
CAL and RET are used to call a subroutine and return from it. Subroutine is another term for subprogram, function or procedure. All are implemented in the same way. These instructions are considered jumps because they alter PC.
Fourth, the store instructions STD and STS write to memory as part of their execute phase. They do not have an operand fetch phase, because their operand is really an address of where to store the value of the A register.
Fifth, the NOP instruction does nothing other than add 1 to PC. This is useful to machine language programmers who might need to add instructions in the middle of a section of code later.
Sixth and lastly, the HLT instruction is very special, since it causes the computer to cease going through its fetch/decode/execute cycle. When HLT is executed, a special bit is set and the cycle of operands is no longer done. Some computers have external buttons that when pressed cause the computer to halt, resume where they left off, or start from 0. Most computers, when they come to life after the power is termed on, start executing a system program that is stored at 0. Thus, 0 is loaded into the PC register and the fetch/decode/execute cycle is begun. This is called booting the computer because it seems as though the computer is pulling itself up by its own bootstraps, or starting itself in a seemingly impossibly circular fashion.