Section 7.1
Review Questions
Architecture of the CSC-1
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To gain familiarity with the CSC-1's block architecture, fill in the empty
boxes below with the names of the registers. Also identify the ALU, the
shifter, the instruction decoder and the memory. You do not need to write
in the names of the various muxes.
answer...
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What three control wires does a "super-register" have?
answer...
LD -- load
CLR -- clear
INCR -- increment
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How many bits wide are most of the registers in the CSC-1?
answer...
16 bits
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Which one register is not the same length as the others?
answer...
MAR (12 bits)
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How wide are the memory words?
answer...
16 bits
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How many words are there in the memory?
answer...
4096
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Is the CSC-1's memory byte-addressable? or word-addressable?
answer...
word-addressable
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How many bytes are in the CSC-1's memory?
answer...
4096 × 2 = 8192 bytes
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How long are the opcode and the operand fields of a
CSC-1 instruction?
answer...
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Match the names of the registers to what they do.
________ holds address of next instruction that A
will be executed TMP
________ contains address of memory word to read S
or write PC
________ a place to hold memory addresses for indirect IR
loads and stores MAR
________ where the data to be written to memory is held MBR
and where data being read from memory is first put
________ the second operand of arithmetic operations
________ the first operand of arithmetic operations and
where the result it put
________ holds the instruction currently being executed
answer...
__PC____ holds address of next instruction that A
will be executed TMP
__MAR___ contains address of memory word to read S
or write PC
__S_____ a place to hold memory addresses for indirect IR
loads and stores MAR
__MBR___ where the data to be written to memory is held MBR
and where data being read from memory is first put
__TMP___ the second operand of arithmetic operations
__A_____ the first operand of arithmetic operations and
where the result it put
__IR____ holds the instruction currently being executed