Section 7.5
Review Questions
Fetch/decode/execute cycle
  1. Order the four main stages of the fetch/decode/execute cycle. Write 1 next to the first one, 2 next to the second one, etc. 
               _______       operand fetch
               
               _______       instruction fetch
               
               _______       execute
               
               _______       opcode decode
answer...
___3___       operand fetch
___1___       instruction fetch
___4___       execute
___2___       opcode decode
  1. During which stage is the PC register always incremented?
answer...
instruction fetch stage
  1. What do we call data that is actually inside the instruction itself and doesn't have to be fetched from memory after the instruction is in the IR register?
answer...
immediate
  1. Which instructions alter the PC register later in the cycle?
answer...
jump (also called called branch or goto) instructions
  1. Which instructions of the CSC-1 are unconditional jumps?
answer...
JMP, CAL, RET
  1. Which instructions of the CSC-1 are conditional jumps?
answer...
JZ, JC, JP, JN, JV
  1. List several commonly used synonyms for jump.
answer...
branch, goto
  1. List the instruction that does nothing, but merely wastes 1 cycle.
answer...
NOP
  1. What good is the above instruction?
answer...
it leaves a space "open" so that a real instruction may be inserted later without having to renumber all the other instructions
  1. Which instruction puts an end to the fetch/decode/execute cycle?
answer...
HLT
  1. Which instructions have no operand fetch stage?
answer...
A2S, S2A, HLT, STS, LDS, SHL, SHR, NOP, RET