Section 7.6
Review Questions
Example of control points and the fetch/decode/execute cycle
  1. In the following picture of the CSC-1, what number will get added to the value in A?
  1. In the following picture, what instruction will get executed next?
  1. Given the following picture, what stage has just finished? A's initial value was 23. 
          instruction fetch
          operation decode
          operand fetch
          execute
  1. Given the following picture, what stage has just finished? A's initial value was 23. 
          instruction fetch
          operation decode
          operand fetch
          execute
  1. Given the following picture, what stage has just finished? A's initial value was 23. 
          instruction fetch
          operation decode
          operand fetch
          execute
  1. Given the following picture, what stage has just finished? A's initial value was 23. 
          instruction fetch
          operation decode
          operand fetch
          execute
  1. Which registers does the MBR's output go to? Circle all that apply. 
     A      TMP      IR       PC      S       MAR
  1. Why do the IR and TMP registers have no muxes controlling their inputs?
  1. Which register(s) would the following instructions change? Circle the correct one(s). 
          ADD:        A       TMP       PC       IR        S
          SUB:        A       TMP       PC       IR        S
          LOD:        A       TMP       PC       IR        S
          STD:        A       TMP       PC       IR        S
          JMP:        A       TMP       PC       IR        S
          CAL:        A       TMP       PC       IR        S
          A2S:        A       TMP       PC       IR        S
          S2A:        A       TMP       PC       IR        S
          LDS:        A       TMP       PC       IR        S
          STS:        A       TMP       PC       IR        S