Chapter 7: A Simple CPU Architecture
Section map

Section 1: Architecture of the CSC-1 Start reading... (Printer friendly)
Section 2: Instructions of the CSC-1 Start reading... (Printer friendly)
Section 3: Control Points Start reading... (Printer friendly)
Section 4: Register Transfer Language Start reading... (Printer friendly)
Section 5: Fetch/Decode/Execute cycle Start reading... (Printer friendly)
Section 6: Example of control points and the fetch/decode/execute cycle Start reading... (Printer friendly)
Section 7: The structure of the control unit Start reading... (Printer friendly)
Section 8: Hardware DFAs Start reading... (Printer friendly)
Supplemental Material

The complete hardware DFA for the CSC-1 computer