Following is the complete instruction set of the CSC-1 along with the RTL (register transfer language) expressions that define what the instructions do.

LOD     load direct              A <- m[x]            Sets CNVZ bits

STD     store direct             m[x] <- A

LDI     load immediate           A <- x               Sets CNVZ bits

LDS     load indirect            A <- m[S]            Sets CNVZ bits

STS     store indirect           m[S] <- A

ADD     add                      A <- A + m[x]        Sets CNVZ bits

SUB     subtract                 A <- A - m[x]        Sets CNVZ bits

AND     and                      A <- A & m[x]        Sets CNVZ bits

OR      or                       A <- A | m[x]        Sets CNVZ bits

NOT     not                      A <- ~m[x]           Sets CNVZ bits

A2S     A to S                   S <- A

S2A     S to A                   A <- S               Sets CNVZ bits

SHL     shift left (logical)     A <- A << 1          Sets CNVZ bits

SHR     shift right (logical)    A <- A >> 1          Sets CNVZ bits

JMP     jump                     PC <- x

JZ      jump if zero             if Z=1 then PC <- x

JC      jump if carry            if C=1 then PC <- x

JV      jump if overflow         if V=1 then PC <- x

JN      jump if negative         if N=1 then PC <- x

JP      jump if positive         if N=0 then PC <- x

CAL     call subroutine          S <- PC; PC <- x

RET     return from subroutine   PC <- S

NOP     no operation             (nothing)

HLT     halt                     (stop the computer)