Section 8.3: RTL as implemented in control points (Frame 2)                     [prev][home][next]

Next, whenever a register's value or memory's data output appears on the right side of the copies operator, the appropriate mux value appears on the mux control wires for the register on the left hand side that select that register's value. Again, A <- S implies that A-MUX1 and A-MUX0 are set appropriately, since the S input to A-MUX is labeled 2 (10 in binary), requiring A-MUX1=1 and A-MUX0=0

Also, the ALU and shifter control inputs are set appropriately whenever operators appear in RTL statements. Thus, A <- A + m[x] implies that 101 appears on the F2F1F0 control wires because 101 is the code for binary addition.