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In steps 1-5, the computer is fetching the next instruction from memory and
putting it into the MBR. It does this by copying the address from the PC
register into the MAR register by setting the appropriate code for MAR-MUX
(012=1) which routes the lower 12 bits of PC into the MAR.
These actions are accomplished in minute steps as follows. Step 1 puts 1 onto the MAR-MUX so that output of the PC register can be copied into the MAR. This happens when MAR-LD flips from 0 to 1 back to 0, in steps 2 and 3. Then the memory is "turned on" by setting MA=1, while also giving the "read" command to memory by setting WR=0. The computer sets up the MBR's MUX to accept the output of memory by selecting port 2 (102=2) of MBR-MUX in step 3. This can happen at the same time as the other settings. Indeed, step 3 may take some time due to the fact that memory accesses might be slow. If the memory is too slow, then time step 3 is repeated, keeping all the wires with the same value. |