Quiz 8.7

DIRECTIONS: Read each question carefully. Then click on the dot next to the answer that most closely fits the question. Try to answer all questions on this quiz and when you are done, click on the grade me button at the bottom.


Coverage: Section 8.7

  1. Which problem of the CSC-1 makes it too difficult to scale it up?
there are too few registers
memory is too small
the registers have undisciplined and idiosyncratic connections between them
multiplexors slow down when there are more and more inputs as would be needed if the number of registers is greatly increased

  1. What is a bus?
something that carries kids to school
a group of wires that has a common purpose, such as carrying one binary number from one place to another
a set of registers that hold related data
contact pads that permit a microprocessor on a chip to communicate with the outside world
Questions 3 through 9 deal with the following picture of the CSC-2, where the main components have been given unmeaningful names.
GIFs/CSC2.gif

  1. Which data pathway funnels results back into registers after an operation has executed?
Z bus
K bus
M bus

  1. Which component performs actual arithmetic operations?
glorp
smurf
zlurpf

  1. Which component is necessary to stabilize values as they roll around the main data path?
glorp
smurf
zlurpf

  1. What is zlurpf? What type of circuit is it?
an ALU
a decoder
a multiplexor
a shifter
a register

  1. Which register is the MAR?
0
5
6
7

  1. Machines like the CSC-2 often have one or two registers that are hard-wired to a constant value. What value is thus hard-wired in the CSC-2?
0
1
2
4095 (all 1s)

  1. What is one rather unusual use of a hard-wired register?
it can be used as input to a decoder to select one of the operand buses as the other arithmetic operand during an operation
it can be used to store a temporary result of an operation while the memory is fetching the next operand
it can be specified as the destination of an operation which would cause the resulting value to be ignored or "thrown away." The purpose of the operation is only to set the condition codes.

  1. Which kind of logic gate is often used to connect the outputs of the registers to the two operand buses?
AND gates
NAND gates
buffers
tri-state buffers

  1. What kind of a circuit is used to control which register gets to put its output value onto one of the operand buses?
decoder
encoder
multiplexor
shifter

  1. How does the CSC-2 prevent the wrong register from receiving the result of an operand coming off the C bus?
A special controller deactivates all the flip flops of all other registers
the LD (load) of only the desired destination register is set to 1, all others are 0
The old value of the non-destination registers is ANDed with all 1s and copied back into the register, while the destination register is ANDed with 0s, thus ensuring that only the destination register gets a new value