Section 8.3
Review Questions
RTL as implemented in control points
Whenever you see the A register on the left side of the
gets assigned
symbol,
<-
, you know that which of the following control wires is set to 1?
MBR-LD F
2
A-LD PC-INCR TMP-LD MAR-LD
What do we call the combinational circuits that decide which of a number of separate inputs gets funneled into a register?
Which kind of gate is used to implement conditional "jumps" such as JZ, written in RTL as:
if Z=1 then PC <- x
Which two registers are implicitly used whenever you see m[X] in any RTL statement?
Which register could possibly have been used in place of the TMP register, thereby making the CSC-1 smaller?