Section 8.4
Review Questions
An instruction in micro-detail
  1. The following sequence of control point assignments implements the ADD instruction in the CSC-1. Circle those lines that implement the four stages of the instruction cycle and label each circle: 
                1. MAR-MUX=01
                2. MAR-LD=1
                3. MAR-LD=0;  MA=1;  WR=0;  MBR-MUX=10
                4. MBR-LD=1
                5. MBR-LD=0;  MA=0;  PC-INCR=1;  IR-LD=1
                6. IR-LD=0;  PC-LD=1
                7. PC-INCR=0;  PC-LD=0
                8. MAR-MUX=00
                9. MAR-LD=1
               10. MAR-LD=0;  MA=1;  WR=0;  MBR-MUX=10
               11. MBR-LD=1
               12. MBR-LD=0;  MA=0
               13. TMP-LD=1
               14. TMP-LD=0;  F=101;  SH=00
               15. A-MUX=00
               16. A-LD=1
               17. A-LD=0
answer...
             +--> 1. MAR-MUX=01
             |    2. MAR-LD=1
          1  |    3. MAR-LD=0;  MA=1;  WR=0;  MBR-MUX=10
             |    4. MBR-LD=1
             |    5. MBR-LD=0;  MA=0;  PC-INCR=1;  IR-LD=1
             |    6. IR-LD=0;  PC-LD=1
             +--> 7. PC-INCR=0;  PC-LD=0
          
          2  (after 6)
          
             +--> 8. MAR-MUX=00
             |    9. MAR-LD=1
          3  |   10. MAR-LD=0;  MA=1;  WR=0;  MBR-MUX=10
             |   11. MBR-LD=1
             |   12. MBR-LD=0;  MA=0
             +-->13. TMP-LD=1
          4 ---->14. TMP-LD=0;  F=101;  SH=00
                 15. A-MUX=00
                 16. A-LD=1
                 17. A-LD=0
          
          1 = instruction fetch stage;  2 = instruction decode stage;
          3 = operand fetch stage;      4 = execute stage
  1. Which stage is included in some architectures but not an "official" stage in the CSC-1's instruction cycle?
answer...
storeback
  1. Why is it a good idea to turn off a control wire after it has been turned on? For instance, A-LD=0 explicitly follows A-LD=1 in step 17.
answer...
so that the wire doesn't stay on and load in a new value that might be wrong
  1. Which steps of the above sequence of control point assignments would be done for every single instruction in the CSC-1?
answer...
steps 1-7 because we must always fetch the next instruction. (PC-INCR is not always needed because the JMP, CAL, RET instructions will overwrite PC anyway, but it is just simpler to increment PC to be uniform.)
  1. List several instructions that do not have a real execute stage in the CSC-1.
answer...
NOP    -- everything after step 7 is not done
LOD    -- just get the operand and store into A
most of the JUMP instructions
  1. Why would it be a good idea to make the control point sequence for an instruction as short as possible?
answer...
to save time! also to minimize complexity in the hardware DFA.
  1. Which lines in the original 17-line control point sequence were combined to get the 13-line sequence shown at the end of Section 8.4?
answer...
1 and 17 were combined
7 and 8 were combined
12 and 13 were combined
14 and 15 were combined