The conditional selection of the next state happens by ANDing the current state wire and hooking this to one of the input wires. For example, in Fig. 7.7.1, the DFA specifies that if we are in state 2 and "c" is true, then the next state should be 3. Thus, we AND state 2's wire with the "c" wire and hook that into the 3 input wire. However, 3 will get stored into the state register only when CK goes high at the next cycle.

The state wires coming out of the DFA are used to set the control wires, such as MAR-LD, PC-INCR, F0, A-MUX1, etc. Many of these control wires must be activated at several different times or by several different situations. AND and OR gates are used to filter and combine these situations that lead to setting the control wires.