How did the computer know that this sequence of 17 steps was what it was supposed to do? Every CSC-1 instruction has at least the instruction fetch stage, so steps 1-7 are fixed. But once the instruction has been decoded (after Step 6), the hardware DFA ANDs the instruction wire for ADD with the other time steps and sets the control points appropriately. In short, the fact that the instruction in the IR register as of the end of Step 5 is an ADD instruction determines that Steps 8 through 17 will be done.