There is a lot of parallelism at the lowest hardware level and signals can flow between different components at the same time as long as they do not interfere with each other. Thus, we could conflate the above 17 steps down to the following 13 for the ADD instruction if we utilized more parallelism. The one tricky thing is that the MAR-MUX is set up to receive the output of PC at the end of the previous instruction, thus, when the computer first fires up, we must assume that MAR-MUX=01 before step 1.

      1.     MAR-LD=1
      2.     MAR-LD=0;  MA=1;  WR=0;  MBR-MUX=10
      3.     MBR-LD=1
      4.     MBR-LD=0;  MA=0;  PC-INCR=1;  IR-LD=1
      5.     IR-LD=0;  PC-LD=1
      6.     PC-INCR=0;  PC-LD=0;  MAR-MUX=00
      7.     MAR-LD=1
      8.     MAR-LD=0;  MA=1;  WR=0;  MBR-MUX=10
      9.     MBR-LD=1
     10.     MBR-LD=0;  MA=0;  TMP-LD=1
     11.     TMP-LD=0;  F=101;  SH=00;  A-MUX=00
     12.     A-LD=1
     13.     A-LD=0;  MAR-MUX=01