Again, if the TMP register were deleted and the MBR used for the second operand, another step could be saved in the following way:

      9.     MBR-LD=1
     10.     MBR-LD=0;  MA=0; F=101;  SH=00;  A-MUX=00
     11.     A-LD=1
     12.     A-LD=0;  MAR-MUX=01

It is precisely this kind of intricate thinking that chip designers go through when they strive to build the fastest possible computer.