The C bus feeds into a set of registers so the wires of this bus are all connected to the data inputs of the flip-flops. The individual load (LD) wires tell which register gets the value. Since all of the registers are connected to the same input wires, it is possible to assign the value on the bus to more than one register simultaneously by setting the LD of two or more registers to 1. However, a more common scheme is to use a decoder for the C bus in order to specify the destination as a 2 bit number, as shown in Fig. 8.7.2.

Note two other features of the CSC-2 computer, namely the two inputs into the MBR which are selected by a special 2x1 mux, and the result register that takes the output of the shifter. This is necessary to stabilize the output of the adder/shifter and to isolate the old values of the registers from the new value. For instance, suppose that the CSC-2 controller tells this circuit to do S <- S + 1. If there were no isolation between the current value of S, which will be on the A bus, and the new value, which is the output of the adder/shifter on the C bus, then it's possible that the bits of S could get scrambled, even if the new value of S is allowed to change only when the LD wire for S goes high.

The MBR gets input from both the memory and from the main data path so it needs its own multiplexor to allow the controller to select which source loads the MBR.