Every system bus has its own clock which dictates how fast signals can change on the wires of the bus. Components which attach to the bus must obey the clock and perform their actions within the time cycles dictated by the bus's clock. There are other clocks within the attached components: the CPU has its own internal clock which regulates how fast it performs instructions, and the various I/O devices have their own clocks, and memory may have its own clock. But all components have to obey the clock of the system bus if they wish to use this common pathway.

In the following discussion we will look at a hypothetical bus and discuss how timing signals work on it as the CPU communicates with memory. Keep in mind that what we will be studying is a vastly simplified version of real buses.