All the signals except the clock above show another convention that seeks to imitate physics, namely that when a signal changes from low to high or high to low, there is a slight slope as it moves to its new value; it does not change instantaneously. In reality, no wire ever changes its voltage level instantaneously due to the inertia of the electrons. The clock signal is shown as a sharp "square wave" only because it changes from low to high and vice versa in a much shorter time span than the other signals.

The bus's clock is what generates the clock signals above. The bus initiators and responders are set up to put new values on the wires and read values off the wires only at certain moments of time, always on a transition of the clock from high to low. This is done because the values on the wires must be copied into flip flops at the junction between the bus and the component. Then the component copies the values out of the flip flops into its other circuitry. Recall that flip flops are edge-triggered memory devices, which means they latch the new value into their memory only when the control wire makes a change in voltage level (and only in one direction.) Therefore, we assume that all the interface registers, which are arrays of these flip flops between the bus and the component, are negatively edge-triggered, i.e. they latch the new value only when the bus clock pulse goes from high to low.