Chapter 18: Control of I/O
Index of Figures
Fig 18.1.1................Connections between the CPU and the ports, and ultimately to the peripherals
Fig 18.1.2................How the ports connect to the flip-flops of the accumulator
Fig 18.2.1................CPU attached to a tape reader, showing four ports
Fig 18.2.2................Simple polling program to read bytes from a device
Fig 18.6.1................Multiplexor as a way of multiplying ports
Fig 18.7.1................Memory address space showing where two peripherals' registers are mapped
Fig 18.7.2................A simple memory-mapped I/O system
Fig 18.7.3................Decoder logic for device active wires; refer to Fig. 18.7.1 for the addresses
Fig 18.7.4................Polling program to read bytes from device A, using memory-mapped I/O